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Freescale Semiconductor Data Sheet: Advance Information
Document Number: MCF51EM256 Rev.2, 4/2010
MCF51EM256
MCF51EM256 Series ColdFire Microcontroller
Covers: MCF51EM256 MCF51EM128
The MCF51EM256/128 series microcontrollers are a member of the ColdFire(R) family of reduced instruction set computing (RISC) microprocessors. This document provides an overview of these 32-bit microcontrollers, focusing on their highly integrated and diverse feature set. These microcontrollers are systems-on-chips (SoCs) that are based on the V1 ColdFire core and the following features: * Operating at processor core speeds up to 50.33 MHz (peripherals operate at half of this speed) at 3.6 V to 2.5 V and 20 MHz at 2.5 V to 1.8 V * Up to 256 KB of flash memory * Up to 16 KB of RAM * Less than 1.3 A of typical power consumption in battery mode, with MCU supply off * Ultra-low power independent RTC with calendar features, separate time base, power domain, and 32 bytes of RAM * A collection of communications peripherals, including UART, IIC and SPI * Integrated 16-bit SAR analog-to-digital converter * Programmable delay block (PDB) * Two analog comparators with selectable interrupt (PRACMP) * LCD driver * * * * * Three serial communications interface modules (SCI) Three serial peripheral interfaces Inter-integrated circuit (IIC) Two 8-bit and one 16-bit modulo timers (MTIM) Two-channel timer/PWM module (TPM)
80 LQFP 14 mm x 14 mm 917A-03 100 LQFP 14 mm x 14 mm 983-02
This document contains information on a product under development. Freescale reserves the right to change or discontinue this product without notice. (c) Freescale Semiconductor, Inc., 2008-2010. All rights reserved. Preliminary--Subject to Change Without Notice
Table of Contents
1 MCF51EM256 Series Configurations . . . . . . . . . . . . . . . . . . . .3 1.1 Device Comparison. . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 1.2 Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 1.3 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 1.3.1 Feature List . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 1.4 Part Numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 1.5 Pinouts and Packaging . . . . . . . . . . . . . . . . . . . . . . . . .11 1.5.1 Pinout: 80-Pin LQFP . . . . . . . . . . . . . . . . . . . . .11 1.5.2 Pinout: 100-Pin LQFP . . . . . . . . . . . . . . . . . . . .12 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 2.1 Parameter Classification . . . . . . . . . . . . . . . . . . . . . . . .16 2.2 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . .17 2.3 Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . .18 2.4 Electrostatic Discharge (ESD) Protection Characteristics 19 2.5 DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 2.6 Supply Current Characteristics . . . . . . . . . . . . . . . . . . .24 2.7 Analog Comparator (PRACMP) Electricals. . . . . . . . . .27 2.8 ADC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .27 2.9 2.10 2.11 2.12 External Oscillator (XOSC) Characteristics . . . . . . . . . Internal Clock Source (ICS) Characteristics . . . . . . . . LCD Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.12.1 Control Timing . . . . . . . . . . . . . . . . . . . . . . . . . 2.12.2 Timer (TPM/FTM) Module Timing . . . . . . . . . . 2.13 VREF Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 2.14 SPI Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.15 Flash Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . 2.16 EMC Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.16.1 Radiated Emissions . . . . . . . . . . . . . . . . . . . . . Mechanical Outline Drawings . . . . . . . . . . . . . . . . . . . . . . . . 3.1 80-pin LQFP Package . . . . . . . . . . . . . . . . . . . . . . . . . 3.2 100-pin LQFP Package . . . . . . . . . . . . . . . . . . . . . . . . Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 35 37 37 38 39 40 40 43 44 44 45 45 49 53
2
3
4
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 2 Preliminary--Subject to Change Without Notice Freescale Semiconductor
MCF51EM256 Series Configurations
1
1.1
MCF51EM256 Series Configurations
Device Comparison
The MCF51EM256 series is summarized in Table 1.
Table 1. MCF51EM256 Series Features by MCU and Package
Feature Flash size (bytes) RAM size (bytes) Robust flash update supported Pin quantity PRACMP1 inputs PRACMP2 inputs ADC modules ADC differential channels1 ADC single-ended channels DBG ICS IIC IRQ IRTC VREF LCD drivers Rapid GPIO2 Port I/O3 Keyboard interface 1 Keyboard interface 2 SCI1 SCI2 SCI3 SPI1 (FIFO) SPI2 (standard) SPI3 (standard) Yes No 44 16 47 37 16 40 8 8 Yes Yes Yes Yes Yes Yes No 4 16 4 2 12 Yes Yes Yes Yes Yes Yes 44 16 47 37 16 40 4 16 100 5 80 3 5 4 2 12 MCF51EM256 262144 16384 Yes 100 5 80 3 MCF51EM128 131072 8192
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 Freescale Semiconductor Preliminary--Subject to Change Without Notice 3
MCF51EM256 Series Configurations
Table 1. MCF51EM256 Series Features by MCU and Package (continued)
Feature MTIM1 (8-bit) MTIM2 (8-bit) MTIM3 (16-it) TPM channels PDB XOSC14 XOSC25
1 2
MCF51EM256 Yes Yes Yes 2 Yes Yes Yes
MCF51EM128
Each differential channel is comprised of 2 pin inputs RGPIO is muxed with standard Port I/O 3 Port I/O count does not include the ouput only PTC2/BKGD/MS. 4 IRTC crystal input and possible crystal input to the ICS module 5 Main external crystal input for the ICS module
1.2
Block Diagram
Figure 1 shows the connections between the MCF51EM256 series pins and modules.
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 4 Preliminary--Subject to Change Without Notice Freescale Semiconductor
MCF51EM256 Series Configurations
VDDA/VSSA VREFH/VREFL AD[20] Port F: AD[7], AD[19:17] DADP/M[3]
trig[D] sel[D][1:0]
PDB
trig[D:A] sel[D:A][1:0] Port F: EXTRIG Port A PTA7/RGPIO7/TPMCLK/PRACMP1P2/AD13 PTA6/RGPIO6/TPMCH1/AD12 PTA5/RGPIO5/TPMCH0/AD11 PTA4/RGPIO4/SS1 PTA3/RGPIO3/SCLK1 PTA2/RGPIO2/MISO1/AD10 PTA1/RGPIO1/MOSI1 PTA0/RGPIO0/IRQ/CLKOUT PTB7/RGPIO15/KBI1P5/TMRCLK2/AD15 PTB6/RGPIO14/KBI1P4/TMRCLK1/AD14 PTB5/RGPIO13/SDA/PRACMP2P3 PTB4/RGPIO12/SCL/PRACMP2P2 PTB3/RGPIO11/KBI1P3/PRACMP2P1/TX1 PTB2/RGPIO10/KBI1P2/PRACMP1P0/RX1 PTB1/RGPIO9/KBI1P1/SS3/TX2 PTB0/RGPIO8/KBI1P0/PRACMP2P0/RX2 PTC7/LCD4 PTC6/LCD3/PRACMP2P4 PTC5/LCD2/PRACMP1P4 PTC4/LCD1/PRACMP2O PTC3/LCD0/PRACMP1O BKGD/MS/PTC2 PTC1/KBI1P7/XTAL2/TX3 PTC0/KBI1P6/EXTAL2/RX3 PTD7/LCD34/KBI2P7 PTD6/LCD33/KBI2P6 PTD5/LCD32/KBI2P5/TMRCLK2 PTD4/LCD31/KBI2P4/TMRCLK1 PTD3/LCD30/KBI2P3 PTD2/LCD29/KBI2P2 PTD1/LCD28/KBI2P1 PTD0/LCD27/KBI2P0 PTE7/LCD5 PTE6/SS3/TX2 PTE5/SCLK3 PTE4/MISO3/MOSI3 PTE3/MOSI3/MISO3 PTE2/PRACMP1P1 PTE1/PRACMP1P3/AD9 PTE0/PRACMP1O/AD8 PTF7/LCD43/AD19 PTF6/LCD42/AD18 PTF5/LCD41/AD17 PTF4/LCD40/AD16 PTF3/LCD39/TX3 PTF2/LCD38/RX3 PTF1/LCD37/EXTRIG PTF0/LCD36
ADC 4
VDDA/VSSA VREFH/VREFL AD[20]
COUT2
trig[C] sel[C][1:0]
Port E, A: AD[4], AD[13,9:8] DADP/M[0]
COUT1 PRACMP1*
ADC 3
VDDA/VSSA VREFH/VREFL VDDA/VSSA VREFH/VREFL AD[20]
PRACMP2 COUT1 Port B: RX1 TX1 Port B Port F Port E Port D Port C
trig[B] sel[B][1:0]
Port F, B: AD[6], AD[19:14] DADP/M[2]
COUT2
SCI1
ADC 2
VDDA/VSSA VREFH/VREFL AD[20]
trig[A] sel[A][1:0]
Port A: AD[5], AD[13:10] DADP/M[1]
SCI2
Port B, E: RX2 TX2 Port C,F: RX3 TX3 Port B: SDA SCL
SCI3
ADC 1
VREFO
IIC VREF KBI 1 & 2 Hardware CRC 2 Channel TPM TPMCH[1:0]
TPMCLK Port A:
Port B/C & D: KBI1P[7:0] KBI2P[7:0]
8-Bit MTIM1 Port B, D:
TMRCLK[n]
BDM
BKGD/MS/PTC2 Port C: BKGD/MS
DBG INTC
16-Bit MTIM3
Port B, D: TMRCLK[n]
8-Bit MTIM2 Port B, D:
TMRCLK[n]
RGPIO
Port B: RGPIO[15:8] Port A: RGPIO[7:0]
Internal Clock Source
REF CLK IRCLK
SPI1
Clock Check & Select
RESET PTA0/RPGPIO0/ IRQ/CLKOUT
SPI2 SIM SPI3 COP LVD FLASH1
128/64 KB
LCD[9:6]: MOSI2 SS2 MISO2 SPSCK2 Port E, B: MOSI3 SS3 MISO3 SPSCK3
EXTAL2 XTAL2 Port A0 or LCD25 CLKO
XOSC2 Port C:
control
V1 ColdFire Core with MAC
Port A: MOSI1 SS1 MISO1 SPSCK1
DADP/M[3,0] AD[7,4] DADP/M[2:1] AD[6:5]
IRQ Robust Update Manager
XOSC1
EXTAL1 XTAL1 Port A0 or LCD25 CLKO
LCD
VLL[3:1], VCAP[2:1] LCD[35] (CLKOUT) LCD[26:25, 20:16] LCD[24:21, 15:10] Port C,E: LCD[5:0] Port D: LCD[34:27] Port F: LCD[43:36] SPI2: LCD[9:6]
FLASH2
128/64 KB
RAM
16/8 KB
VREG
Independent RTC
The IRTC is in a separate power domain, as is the LCD controller.
VDD
VSS1 VSS2
EXTAL1 XTAL1 VBAT TAMPER
1 2
Pins with * are not present on 80-pin devices. PRACMP1 has two less available inputs on the 80-pin devices.
Figure 1. MCF51EM256 Series Block Diagram
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 Freescale Semiconductor Preliminary--Subject to Change Without Notice 5
MCF51EM256 Series Configurations
1.3
Features
Table 2 describes the functional units of the MCF51EM256 series.
Table 2. MCF51EM256 Series Functional Units
Unit ADC (analog-to-digital converter) BDM (background debug module) CF1 CORE (V1 ColdFire core) with MAC unit PRACMP1, PRACMP2 (comparators) COP (computer operating poperly) IRQ (interrupt request) CRC (cyclic Redundancy Check) DBG (debug) FLASH (flash memory) IIC (inter-integrated circuits) INTC (interrupt controller) KBI1 & KBI2 LCD LVD (low voltage detect) Function Measures analog voltages at up to 16 bits of resolution. Each ADC has up to four differential and 24 single-ended inputs. Provides single pin debugging interface (part of the V1 ColdFire core) Executes programs, handles interrupts and containes multiply-accumulate hardware (MAC). Analog comparators for comparing external analog signals against each other, or a variety of reference levels. Software watchdog Single pin high priority interrupt (part of the V1 ColdFire core) High-speed CRC calculation Provides debugging and emulation capabilities (part of the V1 ColdFire core) Provides storage for program code, constants and variables Supports standard IIC communications protocol and SMBus Controls and prioritizes all device interrupts Keyboard Interfaces 1 and 2 Liquid crystal display driver Provides an interrupt to the CF1CORE in the event that the supply voltage drops below a critical value. The LVD can also be programmed to reset the device upon a low voltage event Provides clocking options for the device, including a three frequency-locked loops (FLLs) for multiplying slower reference clock sources The independent real time clock provides an independent time-base with optional interrupt, battery backup and tamper protection The voltage reference output is available for both on and off-chip use 8-bit modulo timers with configurable clock inputs and interrupt generation on overflow 16-bit modulo timer with configurable clock inputs and interrupt generation on overflow This timer is optimized for scheduling ADC conversions Provides stack and variable storage Allows for I/O port access at CPU clock speeds and is used to implement GPIO functionality for PTA and PTB.
ICS (internal clock source)
IRTC (independent real-time clock) VREF (voltage reference) MTIM1, MTIM2 (modulo timers) MTIM3 (modulo timer) PDB (programmable delay block) RAM (random-access memory) RGPIO (rapid general-purpose input/output)
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 6 Preliminary--Subject to Change Without Notice Freescale Semiconductor
MCF51EM256 Series Configurations
Table 2. MCF51EM256 Series Functional Units (continued)
Unit SCI1, SCI2, SCI3(serial communications interfaces) SIM (system integration unit) SPI1 (FIFO), SPI2, SPI3 (serial peripheral SPI1 has full-complementary drive outputs. SPI2 may be configured interfaces) with full-complementary drive output via LCD control registers. SPI3 has open drain outputs on SCLK and (MISO or MOSI). These coupled with off-chip pull-up resistors, allow interface to an external 5 V SPI. TPM (Timer/PWM Module) VREG (voltage regulator) XOSC1 and XOSC2 (crystal oscillators) Timer/PWM module can be used for a variety of generic timer operations as well as pulse-width modulation Controls power management across the device These devices incorporate redundant crystal oscillators in separate power domains.One is intended primarily for use by the IRTC, and the other by the CPU and other peripherals. Function Serial communications UARTs capable of supporting RS-232 and LIN protocols
1.3.1
*
Feature List
32-bit ColdFire V1 central processor unit (CPU) -- Up to 50.33 MHz ColdFire CPU from 3.6 V to 2.5 V and 20 MHz CPU at 2.5 V to 1.8 V across temperature range of -40 C to 85 C -- ColdFire instruction set revision C (ISA_C) plus MAC -- 32-bit multiply and accumulate (MAC) optimized for 16x1632 operations; supports signed or unsigned integer or signed fractional inputs On-chip memory -- MCF51EM256/128 series support two independent flash arrays; read/program/erase over full operating voltage and temperature; allows interrupt processing while programming for robust program updates -- Random-access memory (RAM) -- Security circuitry to prevent unathorized access to RAM and Flash contents Power-saving modes -- Two ultra-low power stop modes -- New low-power run and low-power wait modes -- Reduced power wait mode -- Peripheral clock enable register can disable clocks to unused modules, thereby reducing currents -- Ultra-low power independent real time clock with calendar features (IRTC); runs in all MCU modes; external clock source with trim capabilities; independent voltage source runs IRTC when MCU is powered-down; tamper detection and indicator; battery monitor output to ADC; unaffected by MCU resets -- Ultra-low power external oscillator that can be used in stop modes to provide accurate clock source to IRTC, ICS and LCD
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2
*
*
Freescale Semiconductor
Preliminary--Subject to Change Without Notice
7
MCF51EM256 Series Configurations
*
*
*
*
-- 6 s typical wakeup time from stop3 mode Clock source options -- Two independent oscillators (XOSC1 and XOSC2) -- loop-control Pierce oscillator; 32.768 kHz crystal or ceramic resonator. XOSC1 nominally supports the independent real time clock, and can be powered by a separate battery backup. XOSC2 is the primary external clock source for the ICS -- Internal clock source (ICS) -- internal clock source module containing a frequency-locked-loop (FLL) controlled by internal or external reference (XOSC1 or XOSC2); precision trimming of internal reference allowing 0.2% resolution and typical 0.5% to -1% deviation over temperature and voltage; supporting CPU frequencies from 4 kHz to 50 MHz System protection -- Watchdog computer operating properly (COP) reset with option to run from dedicated 1 kHz internal clock source or bus clock -- Low voltage detection with reset or interrupt; selectable trip points; seperate low voltage warning with optional interrupt; selectable trip points -- Illegal opcode and illegal address detection with reset -- Flash block protection for each array to prevent accidental write/erasure -- Hardware CRC module to support fast cyclic redundancy checks Development support -- Integrated ColdFire DEBUG_Rev_B+ interface with single wire BDM connection supports same electrical interface used by the S08 family debug modules -- Real-time debug support with six hardware breakpoints (4 PC, 1 address and 1 data) -- On-chip trace buffer provides programmable start/stop recording conditions Peripherals -- ADC16 -- 4 analog-to-digital converters; the 100 pin version of the device has 1 dedicated differential channel and 1 dedicated single-ended channel per ADC, along with 3 muxed single-ended channels per ADC. The ADCs have 16-bit resolution, range compare function, 1.7 mV/C temperature sensor, internal bandgap reference channel, operate in stop3 and are fully functional from 3.6 V to 1.8 V -- PDB -- Programmable delay block with 16-bit counter and modulus and 3-bit prescaler; 8 trigger outputs for ADC16 modules (2 per ADC); provides periodic coordination of ADC sampling sequence with programmable sequence completion interrupt -- IRTC -- Ultra-low power independent real time clock with calendar features (IRTC); runs in all MCU modes; external clock source with trim capabilities (XOSC1); independent voltage source runs IRTC when MCU is powered-down; tamper detection and indicator; battery monitor output to ADC; unaffected by MCU resets -- PRACMPx -- Two analog comparators with selectable interrupt on rising, falling, or either edge of comparator output; compare option to programmable internal reference voltage; operation in stop3 -- LCD -- up to 288 segments (8 x 36); 160 segments (4 x 40); internal charge pump and option to provide internal reference voltage that can be trimmed for contrast control; flexible
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 8 Preliminary--Subject to Change Without Notice Freescale Semiconductor
MCF51EM256 Series Configurations
*
*
front-plane/backplane pin assignments; operation in all low power modes with blink functionality -- SCIx -- Three serial communications interface modules with optional 13-bit break; option to connect Rx input to PRACMP output on SCI1 and SCI2; high current drive on Tx on SCI1 and SCI2; wakeup from stop3 on Rx edge. SCI1 and SCI2 Tx pins can be modulated with timer outputs for use with IR interfaces -- SPIx-- Two serial peripheral interfaces (SPI2, SPI3) with full-duplex or single-wire bidirectional; double-buffered transmit and receive; master or slave mode; MSB-first or LSB-first shifting -- SPI16-- Serial peripheral interface (SPI1) with 32-bit FIFO buffer; 16-bit or 8-bit data transfers; full-duplex or single-wire bidirectional; double-buffered transmit and receive; master or slave mode; MSB-first or LSB-first shifting -- IIC -- Up to 100 kbps with maximum bus loading; multi-master operation; programmable slave address; interrupt driven byte-by-byte data transfer; supports broadcast mode and 10 bit addressing -- MTIMx -- Two 8-bit and one 16-bit modulo timers with 4-bit prescaler; overflow interrupt; external clock input/pulse accumulator -- TPM -- 2-channel Timer/PWM module; selectable input capture, output compare, or buffered edge- or center-aligned PWM on each channel; external clock input/pulse accumulator; can be used modulate SCI1 and SCI2 TX pins Input/output -- up to 16 rapid GPIO and 48 standard GPIOs, including 1 output-only pin and 3 open-drain pins. -- up to 16 keyboard interrupts with selectable polarity -- Hysteresis and configurable pullup device on all input pins; configurable slew rate and drive strength on all output pins Package options -- 100-pin LQFP, 80-pin LQFP
1.4
Part Numbers
MCF 51 EM 256 C XX Status (MCF = Fully Qualified ColdFire) (PCF = Product Engineering) Core Family Package designator Temperature range (C= -40C to 85C ) Memory size designator
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 Freescale Semiconductor Preliminary--Subject to Change Without Notice 9
MCF51EM256 Series Configurations
Table 3. Orderable Part Number Summary
Freescale Part Number MCF51EM256CLL MCF51EM256CLK MCF51EM128CLL MCF51EM128CLK Flash / SRAM (KB) 256/16 256/16 128/16 128/16 Package 100-Pin LQFP 80-Pin LQFP 100-Pin LQFP 80-Pin LQFP Temperature -40C to 85C -40C to 85C -40C to 85C -40C to 85C
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 10 Preliminary--Subject to Change Without Notice Freescale Semiconductor
MCF51EM256 Series Configurations
1.5
1.5.1
Pinouts and Packaging
Pinout: 80-Pin LQFP
Pins not available on the 80-pin LQFP are automatically disabled for reduced current consumption. No user interaction is needed. Software access to the functions on these pins will be ignored Figure 2 shows the pinout of the 80-pin LQFP.
VCAP1 VCAP2 VLL1 VLL2 VLL3 VSS LCD24 LCD23 LCD22 LCD21 LCD15 LCD14 LCD13 LCD12 LCD11 LCD10 LCD9/SS2 LCD8/SCLK2 LCD7/MISO2 LCD6/MOSI2 PTD0/LCD27/KBI2P0 PTD1/LCD28/KBI2P1 PTD2/LCD29/KBI2P2 PTD3/LCD30/KBI2P3 PTD4/LCD31/KBI2P4/TMRCLK1 PTD5/LCD32/KBI2P5/TMRCLK2 PTD6/LCD33/KBI2P6 PTD7/LCD34/KBI2P7 LCD35/CLKOUT PTF0/LCD36 PTF1/LCD37/EXTRIG PTF2/LCD38/RX3 PTF3/LCD39/TX3 PTF4/LCD40/AD16 PTF5/LCD41/AD17 PTF6/LCD42/AD18 PTF7/LCD43/AD19 VDDA VREFH DADP1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41
80 LQFP
PTE7/LCD5 PTC7/LCD4 PTC6/LCD3/PRACMP2P5 PTC5/LCD2/PRACMP1P4 PTC4/LCD1/PRACMP2O PTC3/LCD0/PRACMP1O BKGD/MS/PTC2 PTC1/KBI1P7/XTAL2/TX3 PTC0/KBI1P6/EXTAL2/RX3 RESET PTB7/RGPIO15/KBI1P5/TMRCLK2/AD15 PTB6/RGPIO14/KBI1P4/TMRCLK1/AD14 PTB5/RGPIO13/SDA/PRACMP2P3 PTB4/RGPIO12/SCL/PRACMP2P2 PTB3/RGPIO11/KBI1P3/PRACMP2P1/TX1 PTB2/RGPIO10/KBI1P2/PRACMP1P0/RX1 VSS VDD PTB1/RGPIO9/KBI1P1/SS3/TX2 PTB0/RGPIO8/KBI1P0/PRACMP2P0/RX2
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 Freescale Semiconductor Preliminary--Subject to Change Without Notice 11
DADM1 AD5 DADP2 DADM2 AD6 VREFO VREFL VSSA EXTAL1 XTAL1 VBAT TAMPER PTA0/RGPIO0/IRQ/CLKOUT PTA1/RGPIO1/MOSI1 PTA2/RGPIO2/MISO1/AD10 PTA3/RGPIO3/SCLK1 PTA4/RGPIO4/SS1 PTA5/RGPIO5/TPMCH0/AD11 PTA6/RGPIO6/TPMCH1/AD12 PTA7/RGPIO7/TPMCLK/PRACMP1P2/AD13
21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
Figure 2. 80-Pin LQFP Pinout
MCF51EM256 Series Configurations
1.5.2
Pinout: 100-Pin LQFP
Figure 3 shows the pinout configuration for the 100-pin LQFP. Pins which are blacked out do not have an equivalent pin on the 80-pin LQFP package.
LCD8/SCLK2 78 LCD7/MISO2 77 VCAP1 VCAP2 LCD6/MOSI2 76 LCD9/SS2 79 LCD16 LCD15 LCD24 LCD23 LCD22 LCD21 LCD20 LCD19 LCD18 LCD17 LCD14 LCD13 LCD12 82 LCD11 81 LCD10 80
VLL1
VLL2 97
VLL3 96
100
99
98
95
VSS
94
93
92
91
90
89
88
87
86
85
84
LCD25 LCD26 PTD0/LCD27/KBI2P0 PTD1/LCD28/KBI2P1 PTD2/LCD29/KBI2P2 PTD3/LCD30/KBI2P3 PTD4/LCD31/KBI2P4/TMRCLK1 PTD5/LCD32/KBI2P5/TMRCLK2 PTD6/LCD33/KBI2P6 PTD7/LCD34/KBI2P7 LCD35/CLKOUT PTF0/LCD36 PTF1/LCD37/EXTRIG PTF2/LCD38/RX3 PTF3/LCD39/TX3 PTF4/LCD40/AD16 PTF5/LCD41/AD17 PTF6/LCD42/AD18 PTF7/LCD43/AD19 VDDA VREFH DADP0 DADM0 AD4 DADP1
83
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
75 74 73 72 71 70 69 68 67 66 65 64
PTE7/LCD5 PTC7/LCD4 PTC6/LCD3/PRACMP2P4 PTC5/LCD2/PRACMP1P4 PTC4/LCD1/PRACMP2O PTC3/LCD0/PRACMP1O BKGD/MS/PTC2 PTC1/KBI1P7/XTAL2/TX3 PTC0/KBI1P6/EXTAL2/RX3 RESET PTB7/RGPIO15/KBI1P5/TMRCLK2/AD15 PTB6/RGPIO14/KBI1P4/TMRCLK1/AD14 PTE6/SS3/TX2 PTE5/SCLK3 PTE4/MISO3/MOSI3 PTE3/MOSI3/MISO3 PTB5/RGPIO13/SDA/PRACMP2P3 PTB4/RGPIO12/SCL/PRACMP2P2 PTB3/RGPIO11/KBI1P3/PRACMP2P1/TX PTB2/RGPIO10/KBI1P2/PRACMP1P0/RX VSS VDD PTB1/RGPIO9/KBI1P1/SS3/TX2 PTB0/RGPIO8/KBI1P0/PRACMP2P0RX2 PTE2/PRACMP1P1
100 LQFP
63 62 61 60 59 58 57 56 55 54 53 52 51
Figure 3. 100-Pin LQFP Pinout
Table 4 shows the package pin assignments.
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 12 Preliminary--Subject to Change Without Notice Freescale Semiconductor
PTA7/RGPIO7/TPMCLK/PRACMP1P2/AD13
PTE1/PRACMP1P3/AD9
PTA5/RGPIO5/TPMCH0/AD11
PTA6/RGPIO6/TPMCH1/AD12
PTA1/RGPIO1/MOSI1
DADP2
DADP3
PTA0/RGPIO0/IRQ/CLKOUT
PTA2/RGPIO2/MISO1/AD10
PTE0/PRACMP1O/AD8
PTA3/RGPIO3/SCLK1 PTA4/RGPIO4/SS1
EXTAL1
DADM1
DADM2
DADM3
XTAL1
AD5
AD6
AD7
VREFL
VREFO
VSSA
TAMPER
VBAT
MCF51EM256 Series Configurations
Table 4. MCF51EM256 Series Package Pin Assignments
100 LQFP 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 80 LQFP -- -- 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 -- -- -- 20 21 22 23 24 25 -- -- Default Function LCD25 LCD26 PTD0 PTD1 PTD2 PTD3 PTD4 PTD5 PTD6 PTD7 LCD35 PTF0 PTF1 PTF2 PTF3 PTF4 PTF5 PTF6 PTF7 VDDA VREFH DADP0 DADM0 AD4 DADP1 DADM1 AD5 DADP2 DADM2 AD6 DADP3 DADM3 LCD27 LCD28 LCD29 LCD30 LCD31 LCD32 LCD33 LCD34 CLKOUT LCD36 LCD37 LCD38 LCD39 LCD40 LCD41 LCD42 LCD43 EXTRIG RX3 TX3 AD16 AD17 AD18 AD19 KBI2P0 KBI2P1 KBI2P2 KBI2P3 KBI2P4 KBI2P5 KBI2P6 KBI2P7 TMRCLK1 TMRCLK2 ALT1 ALT2 ALT3 Comment
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 Freescale Semiconductor Preliminary--Subject to Change Without Notice 13
MCF51EM256 Series Configurations
Table 4. MCF51EM256 Series Package Pin Assignments (continued)
100 LQFP 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 80 LQFP -- 26 27 28 29 30 31 32 33 -- -- 34 35 36 37 38 39 40 -- 41 Default Function AD7 VREFO VREFL VSSA EXTAL1 XTAL1 VBAT TAMPER PTA0/RGPIO0 PTE0 PTE1 PTA1/RGPIO1 PTA2/RGPIO2 PTA3/RGPIO3 PTA4/RGPIO4 PTA5/RGPIO5 PTA6/RGPIO6 PTA7/RGPIO7 PTE2 PTB0/RGPIO8 KBI1P0 MOSI1 MISO1 SCLK1 SS1 TPMCH0 TPMCH1 TPMCLK PRACMP1P2 PRACMP1P1 PRACMP2P0 RX2 RGPIO_ENB is used to select between standard GPIO and RGPIO 2X Drive Output RGPIO_ENB is used to select between standard GPIO and RGPIO AD11 AD12 AD13 AD10 RGPIO_ENB is used to select between standard GPIO and RGPIO IRQ CLKOUT PRACMP1O PRACMP1P3 AD8 AD9 ALT1 ALT2 ALT3 Comment
53
42
PTB1/RGPIO9
KBI1P1
SS3
TX2
54 55 56
43 44 45
VDD VSS PTB2/RGPIO10 KBI1P2 PRACMP1P0 RX1 RGPIO_ENB is used to select between standard GPIO and RGPIO 2X drive output RGPIO_ENB is used to select between standard GPIO and RGPIO
57
46
PTB3/RGPIO11
KBI1P3
PRACMP2P1
TX1
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 14 Preliminary--Subject to Change Without Notice Freescale Semiconductor
MCF51EM256 Series Configurations
Table 4. MCF51EM256 Series Package Pin Assignments (continued)
100 LQFP 58 59 60 61 62 63 64 65 80 LQFP 47 48 -- -- -- -- 49 50 Default Function PTB4/RGPIO12 PTB5/RGPIO13 PTE3 PTE4 PTE5 PTE6 PTB6/RGPIO14 PTB7/RGPIO15 ALT1 SCL SDA MOSI3 MISO3 SCLK3 SS3 KBI1P4 KBI1P5 TX2 TMRCLK1 TMRCLK2 AD14 AD15 ALT2 PRACMP2P2 PRACMP2P3 MISO3 MOSI3 Open Drain Open Drain Open Drain RGPIO_ENB is used to select between standard GPIO and RGPIO This pin is an open drain device and has an internal pullup. There is no clamp diode to VDD. KBI1P6 KBI1P7 PTC2 LCD0 LCD1 LCD2 LCD3 LCD4 LCD5 MOSI2 MISO2 SCLK2 SS2 PRACMP1O PRACMP2O PRACMP1P4 PRACMP2P4 EXTAL2 XTAL2 RX3 TX3 This pin has an internal pullup. PTC2 can only be programmed as an output. ALT3 Comment RGPIO_ENB is used to select between standard GPIO and RGPIO
66 67 68 69 701 711 721 731 741 751 761 771 781 791 80 81 82 83 84 85 86
51 52 53 54 551 561 571 581 591 601 611 621 631 641 65 66 67 68 69 70 --
RESET PTC0 PTC1 BKGD/MS PTC3 PTC4 PTC5 PTC6 PTC7 PTE7 LCD6 LCD7 LCD8 LCD9 LCD10 LCD11 LCD12 LCD13 LCD14 LCD15 LCD16
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 Freescale Semiconductor Preliminary--Subject to Change Without Notice 15
Electrical Characteristics
Table 4. MCF51EM256 Series Package Pin Assignments (continued)
100 LQFP 87 88 89 90 91 92 93 94 95 96 97 98 99 100
1
80 LQFP -- -- -- -- 71 72 73 74 75 76 77 78 79 80
Default Function LCD17 LCD18 LCD19 LCD20 LCD21 LCD22 LCD23 LCD24 VSS VLL3 VLL2 VLL1 VCAP2 VCAP1
ALT1
ALT2
ALT3
Comment
These pins that are shared with the LCD are open-drain by default if not used as LCD pins. To configure this pins as full complementary drive outputs, you must have the LCD modules bits configured as follow: FCDEN =1, VSUPPLY = 11 and RVEN = 0. The Input levels and internal pullup resistors are referenced to VLL3. Referer to the LCD chapter for further information.
2
Electrical Characteristics
This section contains electrical specification tables and reference timing diagrams for the MCF51EM256/128 series microcontrollers, including detailed information on power considerations, DC/AC electrical characteristics, and AC timing specifications. The electrical specifications are preliminary and are from previous designs or design simulations. These specifications may not be fully tested or guaranteed at this early stage of the product life cycle. These specifications will, however, be met for production silicon. Finalized specifications will be published after complete characterization and device qualifications have been completed. NOTE The parameters specified in this data sheet supersede any values found in the module specifications.
2.1
Parameter Classification
The electrical parameters shown in this supplement are guaranteed by various methods. To give the customer a better understanding the following classification is used and the parameters are tagged accordingly in the tables where appropriate:
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 16 Preliminary--Subject to Change Without Notice Freescale Semiconductor
Electrical Characteristics
Table 5. Parameter Classifications
P C Those parameters are guaranteed during production testing on each individual device. Those parameters are achieved by the design characterization by measuring a statistically relevant sample size across process variations. Those parameters are achieved by design characterization on a small sample size from typical devices under typical conditions unless otherwise noted. All values shown in the typical column are within this category. Those parameters are derived mainly from simulations.
T
D
NOTE The classification is shown in the column labeled "C" in the parameter tables where appropriate.
2.2
Absolute Maximum Ratings
Absolute maximum ratings are stress ratings only, and functional operation at the maxima is not guaranteed. Stress beyond the limits specified in Table 6 may affect device reliability or cause permanent damage to the device. For functional operating conditions, refer to the remaining tables in this section. This device contains circuitry protecting against damage due to high static voltage or electrical fields; however, it is advised that normal precautions be taken to avoid application of any voltages higher than maximum-rated voltages to this high-impedance circuit. Reliability of operation is enhanced if unused inputs are tied to an appropriate logic voltage level (for instance, either VSS or VDD).
Table 6. Absolute Maximum Ratings
Rating Supply voltage Input voltage Instantaneous maximum current Single pin limit (applies to all port pins except PTB1 and PTB3)1, 2, 3 Instantaneous maximum current Single pin limit (applies to PTB1 and PTB3)4, 5, 6 Maximum current into VDD Storage temperature
1
Symbol VDD VIn ID ID IDD Tstg
Value -0.3 to 4.0 -0.3 to VDD + 0.3 25 50 120 -55 to 150
Unit V V mA
mA mA C
Input must be current limited to the value specified. To determine the value of the required current-limiting resistor, calculate resistance values for positive (VDD) and negative (VSS) clamp voltages, then use the larger of the two resistance values. 2 All functional non-supply pins are internally clamped to V SS and VDD.
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 Freescale Semiconductor Preliminary--Subject to Change Without Notice 17
Electrical Characteristics
3
Power supply must maintain regulation within operating VDD range during instantaneous and operating maximum current conditions. If positive injection current (VIn > VDD) is greater than IDD, the injection current may flow out of VDD and could result in external power supply going out of regulation. Ensure external VDD load will shunt current greater than maximum injection current. This will be the greatest risk when the MCU is not consuming power. Examples are: if no system clock is present, or if the clock rate is very low which would reduce overall power consumption. 4 Input must be current limited to the value specified. To determine the value of the required current-limiting resistor, calculate resistance values for positive (VDD) and negative (VSS) clamp voltages, then use the larger of the two resistance values. 5 All functional non-supply pins are internally clamped to VSS and VDD. 6 Power supply must maintain regulation within operating VDD range during instantaneous and operating maximum current conditions. If positive injection current (VIn > VDD) is greater than IDD, the injection current may flow out of VDD and could result in external power supply going out of regulation. Ensure external VDD load will shunt current greater than maximum injection current. This will be the greatest risk when the MCU is not consuming power. Examples are: if no system clock is present, or if the clock rate is very low which would reduce overall power consumption.
2.3
Thermal Characteristics
This section provides information about operating temperature range, power dissipation, and package thermal resistance. Power dissipation on I/O pins is usually small compared to the power dissipation in on-chip logic and it is user-determined rather than being controlled by the MCU design. In order to take PI/O into account in power calculations, determine the difference between actual pin voltage and VSS or VDD and multiply by the pin current for each I/O pin. Except in cases of unusually high pin current (heavy loads), the difference between pin voltage and VSS or VDD will be very small.
Table 7. Thermal Characteristics
Rating Operating temperature range (packaged) Maximum junction temperature Thermal resistance 1,2,3,4 100-pin LQFP 1s 2s2p 80-pin LQFP 1s 2s2p
1
Symbol TA TJM
Value -40 to 85 95
Unit C C
JA
54 42 55 42
C/W
Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting site (board) temperature, ambient temperature, air flow, power dissipation of other components on the board, and board thermal resistance. 2 Junction to Ambient Natural Convection 3 1s -- Single layer board, one signal layer 4 2s2p -- Four layers board, two signal and two power layers
The average chip-junction temperature (TJ) in C can be obtained from:
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 18 Preliminary--Subject to Change Without Notice Freescale Semiconductor
Electrical Characteristics
TJ = TA + (PD x JA)
Eqn. 1
where:
TA = Ambient temperature, C JA = Package thermal resistance, junction-to-ambient, C/W PD = Pint + PI/O Pint = IDD x VDD, Watts -- chip internal power PI/O = Power dissipation on input and output pins -- user determined
For most applications, PI/O << Pint and can be neglected. An approximate relationship between PD and TJ (if PI/O is neglected) is:
PD = K / (TJ + 273C) Eqn. 2
Solving Equation 1 and Equation 2 for K gives:
K = PD x (TA + 273C) + JA x (PD)2 Eqn. 3
where K is a constant pertaining to the particular part. K can be determined from Equation 3 by measuring PD (at equilibrium) for a known TA. Using this value of K, the values of PD and TJ can be obtained by solving Equation 1 and Equation 2 iteratively for any value of TA.
2.4
Electrostatic Discharge (ESD) Protection Characteristics
Although damage from static discharge is much less common on these devices than on early CMOS circuits, normal handling precautions should be used to avoid exposure to static discharge. Qualification tests are performed to ensure that these devices can withstand exposure to reasonable levels of static without suffering any permanent damage. All ESD testing is in conformity with CDF-AEC-Q00 Stress Test Qualification for Automotive Grade Integrated Circuits. (http://www.aecouncil.com/) This device was qualified to AEC-Q100 Rev E. A device is considered to have failed if, after exposure to ESD pulses, the device no longer meets the device specification requirements. Complete dc parametric and functional testing is performed per the applicable device specification at room temperature followed by hot temperature, unless specified otherwise in the device specification.
Table 8. ESD and Latch-up Test Conditions
Model Human Body Series Resistance Storage Capacitance Number of Pulse per pin Machine Series Resistance Storage Capacitance Number of Pulse per pin Latch-up Minimum input voltage limit Maximum input voltage limit Description Symbol R1 C -- R1 C -- Value 1500 100 3 0 200 3 -2.5 7.5 V V pF Unit pF
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 Freescale Semiconductor Preliminary--Subject to Change Without Notice 19
Electrical Characteristics
Table 9. ESD and Latch-Up Protection Characteristics
Num 1 2 3 4 Rating Human Body Model (HBM) Machine Model (MM) Charge Device Model (CDM) Latch-up Current at TA = 85 C Symbol VHBM VMM VCDM ILAT Min 2000 200 500 100 Max -- -- -- -- Unit V V V mA
2.5
DC Characteristics
This section includes information about power supply requirements, I/O pin characteristics, and power supply current in various operating modes.
Table 10. DC Characteristics
Num C 1 2 3 4 P Operating voltage Parameter Digital supply -- 50 MHz operation Digital supply2 -- 20 MHz maximum operation Symbol VDD VDD VDDA VBAT VBG PTA[7:0], PTB[7:0], PTC[2:0], PTE[6:0], low-drive strength. VDD 1.8 V, ILoad = -0.6 mA Output high voltage PTA[7:0], PTB[7:0], PTC[2:0], PTE[6:0], high-drive strength. VDD 2.7 V, ILoad = -10 mA PTA[7:0], PTB[7:0], PTC[2:0], PTE[6:0], high-drive strength. VDD 1.8 V, ILoad = -3 mA PTC[7:3], PTD[7:0], PTE7, PTF[7:0], LCD35/CLKOUT, MOSI2, MISO2, SCK2, SS2, low drive strength. VDD 1.8 V, ILoad = -0.5 mA PTC[7:3], PTD[7:0], PTE7, PTF[7:0], LCD35/CLKOUT, MOSI2, MISO2, SCK2, SS2, high-drive strength. VDD 2.7 V, ILoad = -3 mA PTC[7:3], PTD[7:0], PTE7, PTF[7:0], LCD35/CLKOUT, MOSI2, MISO2, SCK2, SS2, high-drive strength. VDD 1.8 V, ILoad = -1 mA Output high current Max total IOH for all ports IOHT -- -- 100 mA VOH VDD - 0.5 -- -- V VOH VDD - 0.5 -- -- V Min 2.5 1.8 1.8 2.2 1.15 Typical1 -- -- -- 3 1.17 Max 3.6 2.5 3.6 3.3 1.18 V V V V Unit
P Analog supply D Battery supply P Bandgap voltage reference3 C
5
P
C
C
6
Output high P voltage
C
7
D
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 20 Preliminary--Subject to Change Without Notice Freescale Semiconductor
Electrical Characteristics
Table 10. DC Characteristics (continued)
Num C C Parameter PTA[7:0], PTB[7:0], PTC[2:0], PTE[6:0], low-drive strength. VDD 1.8 V, ILoad = 2 mA Output low voltage PTA[7:0], PTB[7:0], PTC[2:0], PTE[6:0], high-drive strength. VDD 2.7 V, ILoad = 10 mA PTA[7:0], PTB[7:0], PTC[2:0], PTE[6:0], high-drive strength. VDD 1.8 V, ILoad = 3 mA PTC[7:3], PTD[7:0], PTE7, PTF[7:0], LCD35/CLKOUT, MOSI2, MISO2, SCK2, SS2, low drive strength. VDD 1.8 V, ILoad = 0.5 mA PTC[7:3], PTD[7:0], PTE7, PTF[7:0], LCD35/CLKOUT, MOSI2, MISO2, SCK2, SS2, high-drive strength. VDD 2.7 V, ILoad = 3 mA PTC[7:3], PTD[7:0], PTE7, PTF[7:0], LCD35/CLKOUT, MOSI2, MISO2, SCK2, SS2, high-drive strength. VDD 1.8 V, ILoad = 1 mA Output low current Max total IOL for all ports All digital inputs except tamper_in, VDD > 2.7 V All digital inputs except tamper_in, 2.7 V > VDD 1.8 V Tamper_in All digital inputs except tamper_in, VDD > 2.7 V all digital inputs except tamper_in, 2.7 V > VDD 1.8 V Tamper_in 13 14 15 16 17 18 19 20 21 C Input hysteresis; all digital inputs P Input leakage current; input only pins P Internal pullup resistors5 P Internal pulldown resistors P POR rearm voltage D POR rearm time Low-voltage P detection threshold High range -- VDD falling High range -- VDD rising VLVDH
6 4
Symbol
Min
Typical1
Max
Unit
8
P
VOL
--
--
0.50
V
C
C
9
Output low P voltage
VOL
--
--
0.50
V
C
10
D
IOLT
-- 0.70 x VDD
-- -- -- -- -- -- -- -- 0.1 0.1 -- -- -- 1.4 -- 2.355 2.425
100 -- -- -- 0.35 x VDD 0.3 x VDD 0.5 -- 1 1 52.5 52.5 8 2.0 -- 2.410 2.480
mA
11
P
Input high voltage
VIH
0.85 x VDD 1.5 --
V
12
Input low P voltage
VIL
-- --
V
Vhys |IIn| |IOZ| RPU RPD CIn VPOR tPOR
0.06 x VDD -- -- 17.5 17.5 -- 0.9 10 2.300 2.370
mV A A k k pF V s V
P High Impedance (off-state) leakage current4
C Input capacitance; all non-supply pins
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 Freescale Semiconductor Preliminary--Subject to Change Without Notice 21
Electrical Characteristics
Table 10. DC Characteristics (continued)
Num C 22 Low-voltage C detection threshold Low-voltage P warning threshold C Low-voltage warning Parameter Low range -- VDD falling Low range -- VDD rising VDD falling, LVWV = 1 VDD rising, LVWV = 1 VDD falling, LVWV = 0 VDD rising, LVWV = 0
7 8 9 10
Symbol VLVDL
Min 1.800 1.870 2.590
Typical1 1.845 1.915 2.655 2.645 2.355 2.425 0.6 -- --
Max 1.890 1.960 2.720 2.710 2.410 2.490 1.0 0.2 5
Unit V V V
23
VLVWH
2.580 2.300 2.360 -- -0.2 -5
24 25
VLVWL VRAM
V V mA mA
D RAM retention voltage DC injection current VIN > VDD, VIN < VSS (single pin limit),
26
D
DC injection current (Total MCU limit, includes sum of all stressed pins), VIN > VDD, VIN < VSS
IIC
Typical values are based on characterization data at 25 C unless otherwise stated. Switch to lower frequency when the low-voltage interrupt asserts (VLVDH). 3 Factory trimmed at V DD = 3.0 V, Temp = 25C 4 Measured with V = V In DD or VSS. 5 Measured with V = V . In SS 6 Measured with V = V . In DD 7 Power supply must maintain regulation within operating V DD range during instantaneous and operating maximum current conditions. If positive injection current (VIn > VDD) is greater than IDD, the injection current may flow out of VDD and could result in external power supply going out of regulation. Ensure external VDD load will shunt current greater than maximum injection current. This will be the greatest risk when the MCU is not consuming power. Examples are: if no system clock is present, or if clock rate is very low (which would reduce overall power consumption). 8 All functional non-supply pins are internally clamped to V SS and VDD. 9 Input must be current limited to the value specified. To determine the value of the required current-limiting resistor, calculate resistance values for positive and negative clamp voltages, then use the larger of the two values. 10 The RESET pin does not have a clamp diode to V . Do not drive this pin above V . DD DD
1 2
PullUp Resistor
45 44 Resistor (kOhm) 43 42 41 40 39 38 1.9 2.2 2.5 2.8 VDD(V) 3.1 3.4 85C 25C -40C
41.5 41 Resistor (kOhm) 40.5 40 39.5 39 38.5 38 37.5 37 1.9 2.2
PullDown Resistor
85C 25C -40C
2.5
2.8 VDD(V)
3.1
3.4
Figure 4. Pullup and Pulldown Typical Resistor Values
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 22 Preliminary--Subject to Change Without Notice Freescale Semiconductor
Electrical Characteristics
VOL vs IOL (Low Drive)
1.60 1.40 1.20 85C VOL(V) 1.00 0.80 0.60 0.40 -40C
Typical VOL vs VDD (IOL = 2mA) 0.39
85C
0.34
25C
25C -40C
VOL(V)
0.29 0.24 0.19
0.20 0.00 0 1 3 5 7 9 IOL(mA) 11 13 15 17 19
0.14 1.8 2 2.2 2.4 2.6 2.8 VDD(V) 3 3.2 3.4 3.6
Figure 5. Typical Low-Side Driver (Sink) Characteristics -- Low Drive (PTxDSn = 0)
VOL vs IOL (High Drive)
1.00 0.90 0.80 0.70 VOL(V) 0.60 0.50 0.40 0.30 0.20 0.10 0.00 0 1 3 5 7 9 IOL(m ) A 11 13 15 17 19
0.2 0.1
IOL = 3mA IOL = 6mA
Typical VOL vs VDD 0.8 0.7 0.6
85oC 25oC
85C -40C
VOL(V)
-40 oC
25C
0.5 0.4 0.3
IOL = 10mA
0.0 1.8 2 2.2 2.4 2.6 2.8 VDD(V) 3 3.2 3.4 3.6
Figure 6. Typical Low-Side Driver (Sink) Characteristics -- High Drive (PTxDSn = 1)
VOH vs IOH (Low Drive)
1.80 1.60 1.40 1.20 VOH(V) 1.00 0.80 0.60 0.40 0.20 0.00 0 -2 -4 -6 -8 -10 IOH(mA) -12 -14 -16 -18 -20
0.24 0.14 1.8 2 2.2 2.4 2.6 2.8 VDD(V) 3 3.2 3.4 3.6 VDD - VOH(V)
Typical VDD - VOH vs VDD (IOH = -2mA)
0.84 0.74 85C 25C -40C
85C 25C -40C
0.64 0.54 0.44 0.34
Figure 7. Typical High-Side (Source) Characteristics -- Low Drive (PTxDSn = 0)
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 Freescale Semiconductor Preliminary--Subject to Change Without Notice 23
Electrical Characteristics
VOH vs IOH (High Drive)
1.40 1.20 1.00 VOH(V) 0.80 0.60 0.40 0.20 0.00 0 -2 -4 -6 -8 -10 -12 IOH(mA) -14 -16 -18 -20 Hot Room Cold
Typical VDD - VOH vs VDD 1.0 0.9 0.8 0.7
VDD - VOH(V)
85oC 25oC -40 oC
0.6 0.5 0.4 0.3 0.2 0.1 0.0
1.8 2 2.2 2.4 2.6 2.8 VDD(V) 3 3.2 IOH = -3mA IOH = -6mA
IOH = -10mA
3.4
3.6
Figure 8. Typical High-Side (Source) Characteristics -- High Drive (PTxDSn = 1)
2.6
Supply Current Characteristics
90 80 70 IDD (mA) 60 50
FEI Off - Hot FEI Off - Cold FEI On - Room FEI Off - Room FEI On - Hot FEI On - Cold
FEI On
FEI Off
40 30 1.8 2.1 2.4 2.7 VDD (V) 3.0 3.3 3.6
Figure 9. Typical Run IDD for FBE and FEI, IDD vs. VDD (All Modules Enabled)
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 24 Preliminary--Subject to Change Without Notice Freescale Semiconductor
Electrical Characteristics
Table 11. Supply Current Characteristics
Num C P 1 T T T C 2 T T T T 3 T Run supply current LPS=0, all modules off Run supply current LPS = 1, all modules off, running from flash Wait mode supply current FEI mode, all modules off Run supply current FEI mode, all modules off Run supply current FEI mode, all modules on Parameter 25.165 MHz 20 MHz 8 MHz 1 MHz 25.165 MHz 20 MHz 8 MHz 1 MHz 16 kHz FBILP 16 kHz FBELP 16 kHz FBELP 25.165 MHz 20 MHz 8 MHz 1 WIDD S2IDD 3 3 2 S3IDD S3IDDLVD 3 2 3 WIDD 3 RIDD 3 RIDD 3 RIDD 3 Symbol VDD (V) Typical1 66.2 55.3 23.9 4.56 55.1 46.6 19.9 3.92 239 249 Max2 82 -- -- -- 56 -- -- -- -- -- A -40 to 85C mA -40 to 85C mA -40 to 85C Unit Temp (C)
4
T
RIDD
3
50
--
A
-40 to 85C
C 5 T T T 6 7 8 T P C P C 9 T
51.1 42.6 18.8 3.69 1 0.576
69 -- -- -- -- 27 16 42 27 -- A A A A -40 to 85C -40 to 85C -40 to 85C -40 to 85C mA -40 to 85C
Wait mode supply current LPRS = 1, all mods off Stop2 mode supply current
Stop3 mode supply current LVD adder to stop3, stop2 (LVDE = LVDSE = 1) Low power mode Tight regulation mode PRG disabled PRG enabled
1.05 120 90
10
T
Voltage reference adder to stop3
S3IDDLVD
3 270 13 29 TBD 5 1.5
--
A
-40 to 85C
11 12 13 14
T T C P
PRACMP adder to stop3
S3IDDLVD S3IDDLVD S3IDDOSC IDD-BAT
3 3 3
-- --
A A A
-40 to 85C -40 to 85C -40 to 85C -40 to 85C
LCD adder to stop3, stop2 Adder to stop3 for oscillator enabled3 (ERCLKEN =1 and EREFSTEN = 1) IRTC supply current4,5,6
5
A
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 Freescale Semiconductor Preliminary--Subject to Change Without Notice 25
Electrical Characteristics
1 2 3 4 5 6
Typicals are measured at 25 C. Values given here are preliminary estimates prior to completing characterization. Values given under the following conditions: low range operation (RANGE = 0), low power mode (HGO = 0). This is the current consumed when the IRTC is being powered by the VBAT. The IRTC power source depends on the MCU configuration and VDD voltage level. Refer to reference manual for further information. The IRTC current consumption includes the IRTC XOSC1.
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 26 Preliminary--Subject to Change Without Notice Freescale Semiconductor
Electrical Characteristics
2.7
Analog Comparator (PRACMP) Electricals
Table 12. PRACMP Electrical Specifications
N 1 2 3 4 5 6 7 8 9 10 11 12 13 14 C -- C C D -- T T D T -- T D D P Characteristic Supply voltage Supply current (active) (PRG enabled) Supply current (active) (PRG disabled) Supply current (ACMP and PRG all disabled) Analog input voltage Analog input offset voltage Analog comparator hysteresis Analog input leakage current Analog comparator initialization delay Programmable reference generator input1 Programmable reference generator input2 Programmable reference generator setup delay Programmable reference generator step size Programmable reference generator voltage range Symbol VPWR IDDACT1 IDDACT2 IDDDIS VAIN VAIO VH IALKG tAINIT VIn1(VDD) VIn2(VDD25) tPRGST Vstep Vprgout Min 1.8 -- -- -- VSS - 0.3 -- 3.0 -- -- -- 1.8 -- -0.25 VIn/32 Typical -- -- -- -- -- 5 -- -- -- VDD -- 1 0 -- Max 3.6 60 40 2 VDD 40 20.0 1 1.0 -- 2.75 -- 0.25 Vin Unit V A A nA V mV mV nA s V V s LSB V
2.8
ADC Characteristics
These specs all assume seperate VDDAD supply for ADC and isolated pad segment for ADC supplies and differential inputs. Spec's should be de-rated for VREFH = Vbg condition.
Table 13. 16-bit ADC Operating Conditions
Num 1 2 3 Supply voltage Ground voltage Ref Voltage High Charact eristic Conditions Absolute Delta to VDD (VDD-VDDA)2 Symb VDDA VDDA VSSA Min 1.8 -100 -100 Typ1 -- 0 0 Max 3.6 100 100 Unit V mV mV Comment
Delta to VSS (VSS-VSSA)2
4
VREFH
1.15
VDDA
VDDA
V
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 Freescale Semiconductor Preliminary--Subject to Change Without Notice 27
Electrical Characteristics
Table 13. 16-bit ADC Operating Conditions
Num Charact eristic Ref Voltage Low Input Voltage Input Capacit ance Input Resista nce 16 bit modes fADCK > 8MHz 4MHz < fADCK < 8MHz fADCK < 4MHz 13/12 bit modes fADCK > 8MHz 4MHz < fADCK < 8MHz fADCK < 4MHz 11/10 bit modes fADCK > 8MHz 4MHz < fADCK < 8MHz fADCK < 4MHz 9/8 bit modes fADCK > 8MHz fADCK < 8MHz ADC Convers ion Clock Freq. ADLPC = 0, ADHSC = 1 ADLPC = 0, ADHSC = 0 ADLPC = 1, ADHSC = 0 fADCK 16-bit modes 8/10/12-bit modes Conditions Symb Min Typ1 Max Unit Comment
5
VREFL
VSSA
VSSA
VSSA
V
6
VADIN
VREFL
-- 8 4
VREFH 10 5
V
7
CADIN
--
pF
8
RADIN
--
2
5
k
9
-- -- -- -- -- -- -- -- -- -- -- 1.0 1.0 1.0
-- -- -- -- -- -- -- -- -- -- -- -- -- --
0.5 1 2 1 2 5 2 5 10 5 10 8 5 2.5 MHz
10
Analog Source Resista nce
External to MCU k Assumes ADLSMP=0
RAS
11
12
13 14 15
1
Typical values assume VDDA = 3.0 V, Temp = 25 C, fADCK = 1.0 MHz unless otherwise stated. Typical values are for reference only and are not tested in production. 2 DC potential difference.
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 28 Preliminary--Subject to Change Without Notice Freescale Semiconductor
Electrical Characteristics
SIMPLIFIED INPUT PIN EQUIVALENT CIRCUIT ZAS RAS VADIN VAS Pad leakage due to input protection
ZADIN SIMPLIFIED CHANNEL SELECT CIRCUIT RADIN
ADC SAR ENGINE
+ -
+ -
CAS
RADIN INPUT PIN
RADIN
For Differential Mode, this figure applies to both inputs
INPUT PIN
RADIN CADIN
INPUT PIN
Figure 10. ADC Input Impedance Equivalency Diagram Table 14. 16-bit ADC Characteristics full operating range(VREFH = VDDAD > 1.8, VREFL = VSSAD, FADCK < 8MHz)
Characteristic Supply Current Conditions1 ADLPC = 1, ADHSC = 0 ADLPC = 0, ADHSC = 0 ADLPC=0, ADHSC=1 Supply Current ADC Asynchronous Clock Source Stop, Reset, Module Off ADLPC = 1, ADHSC = 0 ADLPC = 0, ADHSC = 0 ADLPC = 0, ADHSC = 1 Sample Time Conversion Time See reference manual for sample times See reference manual for conversion times P fADACK C IDDA T IDDA C Symb Min -- -- -- -- -- -- -- Typ2 215 470 610 0.01 2.4 5.2 6.2 Max -- -- -- -- -- -- -- MHz tADACK = 1/fADACK A A ADLSMP = 0 ADCO = 1 Unit Comment
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 Freescale Semiconductor Preliminary--Subject to Change Without Notice 29
Electrical Characteristics
Table 14. 16-bit ADC Characteristics full operating range(VREFH = VDDAD > 1.8, VREFL = VSSAD, FADCK < 8MHz)
Characteristic Total Unadjusted Error Conditions1 16-bit differential mode 16-bit single-ended mode 13-bit differential mode 12-bit single-ended mode 11-bit differential mode 10-bit single-ended mode 9-bit differential mode 8-bit single-ended mode Differential Non-Linearity 16-bit differential mode 16-bit single-ended mode 13-bit differential mode 12-bit single-ended mode 11-bit differential mode 10-bit single-ended mode 9-bit differential mode 8-bit single-ended mode Integral Non-Linearity 16-bit differential mode 16-bit single-ended mode 13-bit differential mode 12-bit single-ended mode 11-bit differential mode 10-bit single-ended mode 9-bit differential mode 8-bit single-ended mode Zero-Scale Error 16-bit differential mode 16-bit single-ended mode 13-bit differential mode 12-bit single-ended mode 11-bit differential mode 10-bit single-ended mode 9-bit differential mode 8-bit single-ended mode C T T T T T T T T T T T T T T T T EZS INL DNL Symb TUE Min -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- Typ2 16 20 1.5 1.75 0.7 0.8 0.5 0.5 2.5 2.5 0.7 0.7 0.5 0.5 0.2 0.2 6.0 10.0 1.0 1.0 0.5 0.5 0.3 0.3 4.0 4.0 0.7 0.7 0.4 0.4 0.2 0.2 Max +48/-40 +56/-28 3.0 3.5 1.5 1.5 1.0 1.0 +5/-3 +5/-3 1 1 0.75 0.75 0.5 0.5 16.0 20.0 2.5 2.5 1.0 1.0 0.5 0.5 +32/-24 +24/-16 2.5 2.0 1.0 1.0 0.5 0.5 LSB2 VADIN = VSSAD LSB2 LSB2 Unit LSB3 Comment 32x Hardware Averaging (AVGE = %1 AVGS = %11)
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 30 Preliminary--Subject to Change Without Notice Freescale Semiconductor
Electrical Characteristics
Table 14. 16-bit ADC Characteristics full operating range(VREFH = VDDAD > 1.8, VREFL = VSSAD, FADCK < 8MHz)
Characteristic Full-Scale Error Conditions1 16-bit differential mode 16-bit single-ended mode 13-bit differential mode 12-bit single-ended mode 11-bit differential mode 10-bit single-ended mode 9-bit differential mode 8-bit single-ended mode Quantization Error Effective Number of Bits 16 bit modes <13 bit modes 16 bit differential mode Avg=32 Avg=16 Avg=8 Avg=4 Avg=1 16 bit single-ended mode Avg=32 Avg=16 Avg=8 Avg=4 Avg=1 Signal to Noise plus Distortion See ENOB SINAD C ENOB 12.8 12.7 12.6 12.5 11.9 D -- -- -- -- -- 13.2 12.8 12.6 12.3 11.5 -- -- -- -- -- dB 14.2 13.8 13.6 13.3 12.5 -- -- -- -- -- C T T T T D EQ Symb EFS Min -- -- -- -- -- -- -- -- -- -- Typ2 +10/0 +14/0 1.0 1.0 0.4 0.4 0.2 0.2 -1 to 0 -- Max +42/-2 +46/-2 3.5 3.5 1.5 1.5 0.5 0.5 -- 0.5 Bits Fin = Fsample/100 LSB2 Unit LSB2 Comment VADIN = VDDAD
SINAD = 6.02 ENOB + 1.76
Total Harmonic Distortion
16-bit differential mode Avg = 32 16-bit single-ended mode Avg = 32
C D
THD -- -- -91.5 -85.5 92.2 86.2 IIn * RAS -74.3 -- dB 75.0 -- -- mV dB
Fin = Fsample/100
Spurious Free Dynamic Range
16-bit differential mode Avg = 32 16-bit single-ended mode Avg = 32 all modes
C D
SFDR
Fin = Fsample/100
-- D EIL
Input Leakage Error
IIn = leakage current (refer to DC characteristics)
Temp Sensor Slope Temp Sensor Voltage
-40C- 25C 25C- 125C 25C
C
m
-- --
1.646 1.769 701.2
-- -- --
mV/C
C
VTEMP25
--
mV
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 Freescale Semiconductor Preliminary--Subject to Change Without Notice 31
Electrical Characteristics
1
All accuracy numbers assume the ADC is calibrated with VREFH = VDDAD Typical values assume VDDAD = 3.0V, Temp = 25C, fADCK = 2.0 MHz unless otherwise stated. Typical values are for reference only and are not tested in production. 3 1 LSB = (VREFH - VREFL)/2N
2
Table 15. 16-bit ADC Characteristics(VREFH = VDDAD > 2.7V, VREFL = VSSAD, FADCK < 4MHz, ADHSC=1)
Characteristic Total Unadjusted Error Conditions1 16-bit differential mode 16-bit single-ended mode 13-bit differential mode 12-bit single-ended mode 11-bit differential mode 10-bit single-ended mode 9-bit differential mode 8-bit single-ended mode Differential Non-Linearity 16-bit differential mode 16-bit single-ended mode 13-bit differential mode 12-bit single-ended mode 11-bit differential mode 10-bit single-ended mode 9-bit differential mode 8-bit single-ended mode Integral Non-Linearity 16-bit differential mode 16-bit single-ended mode 13-bit differential mode 12-bit single-ended mode 11-bit differential mode 10-bit single-ended mode 9-bit differential mode 8-bit single-ended mode Zero-Scale Error 16-bit differential mode 16-bit single-ended mode 13-bit differential mode 12-bit single-ended mode 11-bit differential mode 10-bit single-ended mode 9-bit differential mode 8-bit single-ended mode C T T T T T T T T T T T T T T T T EZS INL DNL Symb TUE Min -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- Typ2 16 20 1.5 1.75 0.7 0.8 0.5 0.5 2.5 2.5 0.7 0.7 0.5 0.5 0.2 0.2 6.0 10.0 1.0 1.0 0.5 0.5 0.3 0.3 4.0 4.0 0.7 0.7 0.4 0.4 0.2 0.2 Max +24/-24 +32/-20 2.0 2.5 1.0 1.25 1.0 1.0 3 3 1 1 0.75 0.75 0.5 0.5 12.0 16.0 2.0 2.0 1.0 1.0 0.5 0.5 +16/0 +16/-8 2.0 2.0 1.0 1.0 0.5 0.5 LSB2 VADIN = VSSAD LSB2 LSB2 Unit LSB3 Comment 32x Hardware Averaging (AVGE = %1 AVGS = %11)
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 32 Preliminary--Subject to Change Without Notice Freescale Semiconductor
Electrical Characteristics
Table 15. 16-bit ADC Characteristics(VREFH = VDDAD > 2.7V, VREFL = VSSAD, FADCK < 4MHz, ADHSC=1)
Characteristic Full-Scale Error Conditions1 16-bit differential mode 16-bit single-ended mode 13-bit differential mode 12-bit single-ended mode 11-bit differential mode 10-bit single-ended mode 9-bit differential mode 8-bit single-ended mode Quantization Error Effective Number of Bits 16 bit modes <13 bit modes 16 bit differential mode Avg = 32 Avg = 16 Avg = 8 Avg = 4 Avg = 1 16 bit single-ended mode Avg = 32 Avg = 16 Avg = 8 Avg = 4 Avg = 1 Signal to Noise plus Distortion See ENOB SINAD C ENOB 14.3 13.8 13.4 13.1 12.4 TBD TBD TBD TBD TBD 14.5 14.0 13.7 13.4 12.6 13.5 13.0 12.7 12.4 11.6 -- -- -- -- -- -- -- -- -- -- dB C T T T T D EQ Symb EFS Min -- -- -- -- -- -- -- -- -- -- Typ2 +8/0 +12/0 0.7 0.7 0.4 0.4 0.2 0.2 -1 to 0 -- Max +24/0 +24/0 2.0 2.5 1.0 1.0 0.5 0.5 -- 0.5 Bits Fin = Fsample/100 LSB2 Unit LSB2 Comment VADIN = VDDAD
SINAD = 6.02 ENOB + 1.76
Total Harmonic Distortion
16-bit differential mode Avg = 32 16-bit single-ended mode Avg = 32
C D
THD -- -- -95.8 -- 96.5 -- IIn * RAS -90.4 --
dB
Fin = Fsample/100
Spurious Free Dynamic Range
16-bit differential mode Avg = 32 16-bit single-ended mode Avg = 32 all modes
C D
SFDR 91.0 -- -- --
dB
Fin = Fsample/100
Input Leakage Error
D
EIL
mV
IIn = leakage current (refer to DC characteristics)
Temp Sensor Slope Temp Sensor Voltage
-40C-25C 25C-125C 25C
D
m
-- --
1.646 1.769 701.2
-- -- --
mV/C
D
VTEMP25
--
mV
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 Freescale Semiconductor Preliminary--Subject to Change Without Notice 33
Electrical Characteristics
1
All accuracy numbers assume the ADC is calibrated with VREFH=VDDAD Typical values assume VDDAD = 3.0 V, Temp = 25 C, fADCK=2.0MHz unless otherwise stated. Typical values are for reference only and are not tested in production. 3 1 LSB = (VREFH-VREFL)/2N
2
2.9
External Oscillator (XOSC) Characteristics
Reference Figure 11 and Figure 12 for crystal or resonator circuits. XOSC1 operates only in low power low range mode. XOSC2 operates in all the power and range modes.
Table 16. XOSC Specifications (Temperature Range = -40 to 85 C Ambient)
Num C Characteristic Symbol flo fhi fhi C1,C2 Min Typ1 Max Unit
1
Oscillator crystal or resonator (EREFS = 1, ERCLKEN = 1) Low range (RANGE = 0) C High range (RANGE = 1), high gain (HGO = 1) High range (RANGE = 1), low power (HGO = 0) Load capacitors D Feedback resistor Low range (RANGE=0), low power (HGO = 0) Other oscillator settings Low range, low power (RANGE = 0, HGO = 0)2 Low range, high gain (RANGE = 0, HGO = 1) High range (RANGE = 1, HGO = X)
32 1 1
-- -- --
38.4 16 8
kHz MHz MHz
2
See Note2 See Note3
3
D
RF
-- -- -- -- -- -- -- -- --
-- 10 1 -- 0 100 0 0 0 600 400 5 15 -- --
-- -- -- -- -- -- 0 10 20 -- -- -- -- 50.33 50.33
M
4
Series resistor -- Low range, low power (RANGE = 0, HGO = 0)2 Low range, high gain (RANGE = 0, HGO = 1) High range, low power (RANGE = 1, HGO = 0) D High range, high gain (RANGE = 1, HGO = 1) 8 MHz 4 MHz 1 MHz Crystal start-up time 4 Low range, low power Low range, high power High range, low power High range, high power Square wave input clock frequency (EREFS = 0, ERCLKEN = 1) FEE mode FBE or FBELP mode
RS
k
t CSTL t CSTH
5
T
-- -- -- -- 0.03125 0
ms
6
1 2
D
fextal
MHz MHz
Data in Typical column was characterized at 3.0 V, 25 C or is typical recommended value. Load capacitors (C1,C2), feedback resistor (RF) and series resistor (RS) are incorporated internally when RANGE = HGO = 0. 3 See crystal or resonator manufacturer's recommendation. 4 Proper PC board layout procedures must be followed to achieve specifications.
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 34 Preliminary--Subject to Change Without Notice Freescale Semiconductor
Electrical Characteristics
XOSC EXTAL XTAL RS
RF
C1
Crystal or Resonator C2
Figure 11. Typical Crystal or Resonator Circuit: High Range and Low Range/High Gain
XOSC EXTAL XTAL
Crystal or Resonator
Figure 12. Typical Crystal or Resonator Circuit: Low Range/Low Gain
2.10
Num 1 2 3 C P P T P 4
Internal Clock Source (ICS) Characteristics
Table 17. ICS Frequency Specifications (Temperature Range = -40 to 85 C Ambient)
Characteristic Average internal reference frequency -- factory trimmed at VDD = 3.6 V and temperature = 25 C Internal reference frequency -- user trimmed Internal reference start-up time Low range (DRS = 00) Mid range (DRS = 01) High range (DRS = 10) Low range (DRS = 00) Mid range (DRS = 01) High range (DRS = 10) fdco_res_t fdco_res_t fdco_DMX32 fdco_u Symbol fint_ft fint_ut tIRST Min -- 31.25 -- 16 32 48 -- -- -- -- -- Typical1 32.768 -- 60 -- -- -- 19.92 39.85 59.77 0.1 0.2 Max -- 39.06 100 20 40 60 -- -- -- 0.2 0.4 %fdco %fdco MHz MHz Unit kHz kHz s
DCO output frequency range C -- trimmed2 P P DCO output frequency2 Reference = 32768 Hz and DMX32 = 1
5
P P
6 7
C C
Resolution of trimmed DCO output frequency at fixed voltage and temperature (using FTRIM) Resolution of trimmed DCO output frequency at fixed voltage and temperature (not using FTRIM)
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 Freescale Semiconductor Preliminary--Subject to Change Without Notice 35
Electrical Characteristics
Table 17. ICS Frequency Specifications (Temperature Range = -40 to 85 C Ambient) (continued)
Num 8 9 10 11
1 2
C C C
Characteristic Total deviation of trimmed DCO output frequency over voltage and temperature Total deviation of trimmed DCO output frequency over fixed voltage and temperature range of 0 C to 70 C
Symbol fdco_t fdco_t tAcquire CJitter
Min -- -- -- --
Typical1 0.5 -1.0 0.5 -- 0.02
Max 2 1 1 0.2
Unit %fdco %fdco ms %fdco
C FLL acquisition time 3 C Long term jitter of DCO output clock (averaged over 2 ms interval)4
Data in Typical column was characterized at 3.0 V, 25 C or is typical recommended value. The resulting bus clock frequency should not exceed the maximum specified bus clock frequency of the device. 3 This specification applies to any time the FLL reference source or reference divider is changed, trim value changed or changing from FLL disabled (FBELP, FBILP) to FLL enabled (FEI, FEE, FBE, FBI). If a crystal/resonator is being used as the reference, this specification assumes it is already running. 4 Jitter is the average deviation from the programmed frequency measured over the specified interval at maximum f Bus. Measurements are made with the device powered by filtered supplies and clocked by a stable external clock signal. Noise injected into the FLL circuitry via VDD and VSS and variation in crystal oscillator frequency increase the CJitter percentage for a given interval.
60 50 Freq (Mhz) 40 30 20 10 0 -40 -30 -20 -10 0 10 25 35 45 55 65 75 85 95 Temp (C) HR MR LR
Figure 13. Deviation of DCO Output from Trimmed Frequency (50.33 MHz, 3.0 V)
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 36 Preliminary--Subject to Change Without Notice Freescale Semiconductor
Electrical Characteristics
60 50 Freq (Mhz) 40 30 20 10 0 2.00 V 2.25 V 2.50 V 2.75 V 3.00 V Vdd (V) 3.25 V 3.50 V 3.75 V 4.00 V HR MR LR
Figure 14. Deviation of DCO Output from Trimmed Frequency (50.33 MHz, 25 C)
o
2.11
LCD Specifications
Table 18. LCD Electricals, 3 V Glass
N 1 2 3 4 5 6 7 8 9 10
1 2
C D D D D D D D D D
Characteristic LCD frame frequency LCD charge pump capacitance LCD bypass capacitance LCD glass capacitance VIREG VIREG trim resolution VIREG ripple VIREG current adder VLCD buffered adder
3
Symbol fFrame CLCD CBYLCD Cglass HRefSel = 0 HRefSel = 1 VIREG RTRIM HRefSel = 0 HRefSel = 1 RVEN = 1 IVIREG IBuff
Min 28
Typical 30 100 100 2000
Max 58 100 100 8000 1.15 1.851
Unit Hz nF nF pF V % VIREG
.89 1.49 1.5 -- -- --
1.00 1.67
0.1 0.15 12 1
V A A
VIREG Max can not exceed VDD - 0.15 V 2000 pF Load LCD, frame frequency = 32 Hz 3 VSUPPLY = 10, BYPASS = 0
2.12
AC Characteristics
This section describes AC timing characteristics for each peripheral system.
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 Freescale Semiconductor Preliminary--Subject to Change Without Notice 37
Electrical Characteristics
2.12.1
Num 1 2 3 4 5 6 7 C D D D D D D D
Control Timing
Table 19. Control Timing
Parameter Bus frequency (tcyc = 1/fBus) Internal low-power oscillator period External reset pulse width (tcyc = 1/fSelf_reset) Reset low drive Active background debug mode latch setup time Active background debug mode latch hold time IRQ pulse width Asynchronous path2 Synchronous path3 KBIPx pulse width Asynchronous path2 Synchronous path3 Port rise and fall time (load = 50 pF)4 Slew rate control disabled (PTxSE = 0), low drive Slew rate control enabled (PTxSE = 1), low drive Slew rate control disabled (PTxSE = 0), low drive Slew rate control enabled (PTxSE = 1), low drive tILIH, tIHIL 100 1.5 x tcyc 100 1.5 x tcyc -- -- ns
2
Symbol fBus tLPO textrst trstdrv tMSSU tMSH
Min DC 700 100 66 x tcyc 500 100
Typical1 --
Max 25.165 1300 -- -- -- --
Unit MHz s ns ns ns ns
8
D
tILIH, tIHIL
--
--
ns
9
D
tRise, tFall
-- --
11 35 40 75
ns
Typical values are based on characterization data at VDD = 5.0 V, 25 C unless otherwise stated. This is the shortest pulse that is guaranteed to be recognized as a reset pin request. Shorter pulses are not guaranteed to override reset requests from internal sources. 3 This is the minimum pulse width that is guaranteed to pass through the pin synchronization circuitry. Shorter pulses may or may not be recognized. In stop mode, the synchronizer is bypassed so shorter pulses can be recognized in that case. 4 Timing is shown with respect to 20% V DD and 80% VDD levels. Temperature range -40 C to 105 C.
1 2
textrst RESET PIN
Figure 15. Reset Timing
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 38 Preliminary--Subject to Change Without Notice Freescale Semiconductor
Electrical Characteristics
tIHIL IRQ/KBIPx
IRQ/KBIPx tILIH
Figure 16. IRQ/KBIPx Timing
2.12.2
Timer (TPM/FTM) Module Timing
Synchronizer circuits determine the shortest input pulses that can be recognized or the fastest clock that can be used as the optional external source to the timer counter. These synchronizers operate from the current bus rate clock.
Table 20. TPM Input Timing
No. 1 2 3 4 5 C D D D D D Function External clock frequency External clock period External clock high time External clock low time Input capture pulse width Symbol fTCLK tTCLK tclkh tclkl tICPW
tTCLK tclkh
Min 0 4 1.5 1.5 1.5
Max fBus/4 -- -- -- --
Unit Hz tcyc tcyc tcyc tcyc
TCLK tclkl
Figure 17. Timer External Clock
tICPW TPMCHn
TPMCHn tICPW
Figure 18. Timer Input Capture Pulse
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 Freescale Semiconductor Preliminary--Subject to Change Without Notice 39
Electrical Characteristics
2.13
VREF Characteristics
Table 21. VREF Electrical Specifications
Num 1 2 3 4
C -- -- D C P D
Characteristic Supply voltage Operating temperature range Load capability Voltage reference output untrimmed factory trimmed Load regulation mode = 10, Iload = 1 mA Line regulation (power supply rejection) DC AC Bandgap only (mode = 00) Low power mode (mode = 01) Tight regulation mode (mode =10)
Symbol VDDAD Top Iload VREFO
Min 1.80 -40 -- 1.070 1.13 20
Typical -- -- -- -- 1.150 --
Max 3.60 105 10 1.202 1.17 100
Unit V C mA V V V/mA
5
6
T
0.1 from room temp voltage -60 IBG ILP ITR -- -- -- 72 90 0.27 -- 125 --
mV dB A A mA
7 8 9
T C T
2.14
SPI Characteristics
Table 22 and Figure 19 through Figure 22 describe the timing requirements for the SPI system.
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 40 Preliminary--Subject to Change Without Notice Freescale Semiconductor
Electrical Characteristics
Table 22. SPI Electrical Characteristic1,2
Num3 1 C D SPSCK period 2 D Enable lead time 3 D Enable lag time 4 D Master Slave Clock (SPSCK) high or low time Master Slave Data setup time (inputs) 6 D Data hold time (inputs) 7 8 9 10 D D D D Data hold time (outputs) 11 D Rise time 12 D Fall time 13
1
Characteristic4 Operating frequency Master Slave Master Slave Master Slave
Symbol
Min fBus/2048 0 2 4 1/2 -- 1/2 --
Max fBus/2 fBus/4 2048 -- -- -- -- -- 1024 tcyc -- -- -- -- -- 1 1 25 25 -- -- tcyc - 25 --25 tcyc - 25 --25
Unit
fop
Hz
tSPSCK
tcyc tSPSCK tcyc tSPSCK tcyc
tLead
tLag
5
D
tWSPSCK
tcyc - 30
ns
Master Slave Master Slave Slave access time5 Slave MISO disable time6 Master Slave Master Slave Input Output Input Output
tSI
15 15 0 25 -- -- -- -- 0 0 -- -- -- --
ns
tHI ta tdis
ns tcyc tcyc
Data valid (after SPSCK edge) tv ns
tHO
ns
tRI tRO tFI tFO
ns
D
ns
The performance of SPI2 depends on the configuration of power supply of the LCD pins. When the LCD pins are configured with full complementary drive enabled (FCDEN = 1, VSUPPLY = 11 and RVEN = 0), and VLL3 is driven with external VDD, the SPI2 can operate at the max performance as the above table. When the internal LCD charge pump is used to power the LCD pins, the SPI2 is configured with open-drain outputs. Its performance depends on the value of the external pullup resistor implemented, and the max operating frequency must be limited to 1 MHz. 2 SPI3 has open-drain outputs and its performance depends on the value of the external pullup resistor implemented. 3 Refer to Figure 19 through Figure 22.
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 Freescale Semiconductor Preliminary--Subject to Change Without Notice 41
Electrical Characteristics
4
All timing is shown with respect to 20% VDD and 70% VDD, unless noted; 100 pF load on all SPI pins. All timing assumes slew rate control disabled and high drive strength enabled for SPI output pins. 5 Time to data active from high-impedance state. 6 Hold time to high-impedance state.
SS1 (OUTPUT) 2 SCK (CPOL = 0) (OUTPUT) SCK (CPOL = 1) (OUTPUT) 6 MISO (INPUT) MSB IN2 11 MOSI (OUTPUT) MSB OUT2 7 BIT 6 . . . 1 11 BIT 6 . . . 1 LSB OUT LSB IN 12 2 5 4 3
5 4
NOTES: 1. SS output mode (MODFEN = 1, SSOE = 1). 2. LSBF = 0. For LSBF = 1, bit order is LSB, bit 1, ..., bit 6, MSB.
Figure 19. SPI Master Timing (CPHA = 0)
SS(1) (OUTPUT) 2 2 SCK (CPOL = 0) (OUTPUT) SCK (CPOL = 1) (OUTPUT) MISO (INPUT) 11 MOSI (OUTPUT) MSB OUT(2) 5 4 5 4 6 7 MSB IN(2) BIT 6 . . . 1 12 BIT 6 . . . 1 LSB OUT LSB IN 3
NOTES: 1. SS output mode (MODFEN = 1, SSOE = 1). 2. LSBF = 0. For LSBF = 1, bit order is LSB, bit 1, ..., bit 6, MSB.
Figure 20. SPI Master Timing (CPHA = 1)
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 42 Preliminary--Subject to Change Without Notice Freescale Semiconductor
Electrical Characteristics
SS (INPUT) 2 SCK (CPOL = 0) (INPUT) 2 SCK (CPOL = 1) (INPUT) 8 MISO (OUTPUT) SLAVE 6 MOSI (INPUT)
NOTE:
3 5
4
5 4 11 MSB OUT 7 MSB IN BIT 6 . . . 1 LSB IN BIT 6 . . . 1 12 SLAVE LSB OUT SEE NOTE 9
1. Not defined but normally MSB of character just received
Figure 21. SPI Slave Timing (CPHA = 0)
SS (INPUT) 2 2 SCK (CPOL = 0) (INPUT) SCK (CPOL = 1) (INPUT) MISO (OUTPUT) SEE NOTE 8 MOSI (INPUT) 5 4 5 4 11 SLAVE 6 MSB IN MSB OUT 7 BIT 6 . . . 1 LSB IN 12 BIT 6 . . . 1 SLAVE LSB OUT 9 3
NOTE: 1. Not defined but normally LSB of character just received
Figure 22. SPI Slave Timing (CPHA = 1)
2.15
Flash Specifications
This section provides details about program/erase times and program-erase endurance for the flash memory. Program and erase operations do not require any special power sources other than the normal VDD supply. For more detailed information about program/erase operations, see the Memory section of the MCF51EM256 Series ColdFire Microcontroller Reference Manual.
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 Freescale Semiconductor Preliminary--Subject to Change Without Notice 43
Electrical Characteristics
Table 23. Flash Characteristics
N 1 2 3 4 5 6 7 8 9 10 11 12
1 2
C D D D D P P P P
Characteristic Supply voltage for program/erase -40 C to 85 C Supply voltage for read operation Internal FCLK frequency1 Internal FCLK period (1/fFCLK) Longword program time (random location) Longword program time (burst mode)2 Page erase time2 Mass erase time
2 2
Symbol Vprog/erase VRead fFCLK tFcyc tprog tBurst tPage tMass
Min 1.8 1.8 150 5
Typical
Max 3.6 3.6 200 6.67
Unit V V kHz s tFcyc tFcyc tFcyc tFcyc
9 4 4000 20,000 -- -- 10,000 -- 9.7 7.6 -- 100,000 100 -- -- -- -- --
Longword program
current3
RIDDBP RIDDPE
mA mA cycles years
Page erase current3 C C Program/erase endurance4 TL to TH = -40 C to 85 C T = 25 C Data retention5
tD_ret
15
The frequency of this clock is controlled by a software setting. These values are hardware state machine controlled. User code does not need to count cycles. This information supplied for calculating approximate time to program and erase. 3 The program and erase currents are additional to the standard run IDD. These values are measured at room temperatures with VDD = 3.0 V, bus frequency = 4.0 MHz. 4 Typical endurance for flash was evaluated for this product family on the HC9S12Dx64. For additional information on how Freescale defines typical endurance, please refer to Engineering Bulletin EB619, Typical Endurance for Nonvolatile Memory. 5 Typical data retention values are based on intrinsic capability of the technology measured at high temperature and de-rated to 25C using the Arrhenius equation. For additional information on how Freescale defines typical data retention, please refer to Engineering Bulletin EB618, Typical Data Retention for Nonvolatile Memory.
2.16
EMC Performance
Electromagnetic compatibility (EMC) performance is highly dependant on the environment in which the MCU resides. Board design and layout, circuit topology choices, location and characteristics of external components as well as MCU software operation all play a significant role in EMC performance. The system designer should consult Freescale applications notes such as AN2321, AN1050, AN1263, AN2764, and AN1259 for advice and guidance specifically targeted at optimizing EMC performance.
2.16.1
Radiated Emissions
Microcontroller radiated RF emissions are measured from 150 kHz to 1 GHz using the TEM/GTEM Cell method in accordance with the IEC 61967-2 and SAE J1752/3 standards. The measurement is performed with the microcontroller installed on a custom EMC evaluation board while running specialized EMC test software. The radiated emissions from the microcontroller are measured in a TEM cell in two package orientations (North and East). For more detailed information concerning the evaluation results, conditions and setup, please refer to the EMC Evaluation Report for this device.
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 44 Preliminary--Subject to Change Without Notice Freescale Semiconductor
Mechanical Outline Drawings
3
3.1
Mechanical Outline Drawings
80-pin LQFP Package
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 Freescale Semiconductor Preliminary--Subject to Change Without Notice 45
Mechanical Outline Drawings
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 46 Preliminary--Subject to Change Without Notice Freescale Semiconductor
Mechanical Outline Drawings
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 Freescale Semiconductor Preliminary--Subject to Change Without Notice 47
Mechanical Outline Drawings
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 48 Preliminary--Subject to Change Without Notice Freescale Semiconductor
Mechanical Outline Drawings
3.2
100-pin LQFP Package
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 Freescale Semiconductor Preliminary--Subject to Change Without Notice 49
Mechanical Outline Drawings
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 50 Preliminary--Subject to Change Without Notice Freescale Semiconductor
Mechanical Outline Drawings
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 Freescale Semiconductor Preliminary--Subject to Change Without Notice 51
Mechanical Outline Drawings
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 52 Preliminary--Subject to Change Without Notice Freescale Semiconductor
4
Revision History
Table 24. Revision History
Revision 1 2 Date 10/15/2009 4/29/2010 Initial public release. Updated teh descriptions of SPI in the Table 2. Changed the FSPIx to SPI16 to keep the term in accordance. Updated Figure 4 to Figure 8. Updated WIDD, S2IDD, S3IDD in the Table 11. Updated the ADC characteristics in the Table 13 to Table 15. Updated description of XOSC in the Section 2.9, "External Oscillator (XOSC) Characteristics." Updated tCSTL in the Table 16. Updated the the classification of IBG and ITR to T and added Voltage reference output (factory trimmed) in the Table 21. Update SPI data in the Table 22. Description
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Information in this document is provided solely to enable system and software implementers to use Freescale Semiconductor products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. Freescale Semiconductor reserves the right to make changes without further notice to any products herein. Freescale Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters that may be provided in Freescale Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals", must be validated for each customer application by customer's technical experts. Freescale Semiconductor does not convey any license under its patent rights nor the rights of others. Freescale Semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Freescale Semiconductor product could create a situation where personal injury or death may occur. Should Buyer purchase or use Freescale Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold Freescale Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Freescale Semiconductor was negligent regarding the design or manufacture of the part.
FreescaleTM and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. (c) Freescale Semiconductor, Inc. 2008-2010. All rights reserved. MCF51EM256 Rev.2 4/2010
Preliminary--Subject to Change Without Notice

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